The present invention relates to a switched mode control system with output feedback and under-voltage detection.
Quantum leaps in electronic technology have led to the development of xe2x80x9csmartxe2x80x9d electrical and electronic products. Each of these products requires a steady and clean source of power from a power supply. In one common power supply known as a switching power supply, an integrated circuit (IC) regulator is connected in series with a primary winding of a transformer to the high voltage direct current (DC) input derived from alternating current (AC) power line through rectification and filtering. Energy is transferred to the secondary winding in a manner controlled by the IC regulator so as to provide a clean and constant output voltage. Another winding called a feedback or bias winding may be used to provide a feedback signal to the IC regulator. Alternately, the feedback signal can come through an optocoupler from a sense circuit at the secondary output. The feedback signal is used to modulate the duty cycle of the IC regulator or used to allow or disallow cycles in order to control the secondary output.
When the power supply is turned on or off, a temporary uncertainty exists in the output of the power supply. The uncertainty leads to transients or glitches in the output voltage. The condition may cause the output of the power supply to fluctuate unpredictably. For instance, the power supply output may go to zero volts and come back up partially several times during power-down (glitch). Power supplies with auto-restart circuit, which are designed to restart the power supply periodically under fault conditions, are susceptible to such glitches during power-down. Since digital and analog ICs used in modern products are highly sensitive to fluctuations in their voltage supply, such an under-voltage condition may lead to erratic or inoperative products.
A circuit detects an under-voltage condition at a voltage input of a power supply. In one aspect, the circuit has a current mirror for receiving current representing the voltage input to the power supply; and a reference current source coupled to the current mirror to generate an under-voltage signal when the reference current exceeds the current from the power supply voltage input. The power supply is disabled when the under-voltage signal is generated.
Implementations of the invention include one or more of the following. The under-voltage condition is detected during power up and/or during an off cycle of an auto-restart operation of the power supply. A resistor may be connected to the power supply input voltage and a first isolation transistor may be connected between the resistor and the current mirror. The current mirror may include a first transistor having a gate and a drain, the gate being connected to the drain and a second transistor having a gate, the gate of the second transistor connected to the gate of the first transistor. The reference current source may be connected to the second transistor. The resistor may be connected to the power supply voltage input at an electrical terminal. A second current source and a second isolation transistor may be connected between the second current source and the electrical terminal to receive a feedback signal. A latch may be connected to the output of the second reference current source to receive the feedback signal. The electrical terminal receives both the feedback signal and the under-voltage signal. Further, only one of the first and second isolation transistors may conduct at a time.
In a second aspect, a method for handling an under-voltage condition at a voltage input of a power supply includes sensing an input current representing the voltage input of the power supply; generating a reference current; comparing the input current with the reference current; detecting the under-voltage condition when the reference current exceeds the input current; and disabling the power supply when the under-voltage condition is detected.
Implementations of the invention include one or more of the following. The under-voltage condition may be detected during power up and during an off cycle in an auto-restart operation of the power supply. The input current may be mirrored by passing the input current through a first transistor having a gate and a drain, the gate being connected to the drain; and passing the input current through a second transistor having a gate, the gate of the second transistor connected to the gate of the first transistor. The input current and a feedback signal may be received on one electrical terminal. A second reference current source may be connected to the electrical terminal to receive a feedback signal. Current flow from the second current source to the electrical terminal may be isolated when detecting the under-voltage condition. The feedback signal from the electrical terminal may be latched. The method may include isolating the electrical terminal and a second current source during predetermined periods. Where a second isolation transistor is connected between the electrical terminal and the current mirror, the method may include comprising conducting each of the first and second isolation transistors one at a time. The method also includes detecting if a fault condition exists and if so, disabling a power switching transistor in the power supply.
In another aspect, a regulator circuit is connected in series with a transformer primary winding to an input voltage. The regulator circuit includes a resistor coupled to the input voltage, the resistor providing an input current representing the input voltage; a current mirror coupled to the resistor for mirroring the input current; and a reference current source coupled to the current mirror to generate an under-voltage signal when the reference current exceeds the input current, the power supply being disabled when the under-voltage signal is generated.
Implementations of the invention include one or more of the following. The under-voltage signal is detected during power up and/or during an off cycle in an auto-restart operation of the regulator circuit. A transistor may be connected between the resistor and the current mirror. The current mirror may include a first transistor having a gate and a drain, the gate being connected to the drain and a second transistor having a gate, the gate of the second transistor connected to the gate of the first transistor. A second reference current source may be used, and a first isolation transistor may be connected between the second current source and the resistor. A latch may be connected to the output of the second reference current source for receiving a feedback signal. The feedback signal and the under-voltage signal may be received by one electrical terminal. A second isolation transistor may be connected between the electrical terminal and the current mirror, wherein each of the first and second isolation transistors conducts one at a time. A power switching transistor may be connected to the under-voltage signal.
In another aspect, a power supply circuit has an under-voltage detector for receiving a signal representing an input voltage on an electrical terminal to detect under-voltage condition, the power supply being disabled when the under-voltage condition is detected. The circuit has a circuit for receiving a feedback signal on the electrical terminal. The feedback signal is used to regulate the power supply output.
Implementations of the invention include one or more of the following. The under-voltage signal may be a current proportional to the input voltage. The current may flow through a resistor coupled between the input voltage and the electrical terminal. The feedback signal may be digital.
In yet another aspect, a power supply includes an auto-restart circuit for alternatingly disabling and enabling the power supply when the power supply is under a fault condition. The power supply also has an input under-voltage detector to detect an input under-voltage condition when the power supply is disabled by the auto-restart circuit and during power-up.
An implementation of the invention may prevent the power supply from being enabled following the-detection of the input under-voltage condition until the input under-voltage condition is removed.
In another aspect, a method for handling an under-voltage condition at an input voltage of power supply circuit includes receiving an input signal representing the input voltage on an electrical terminal, the electrical terminal carrying the input signal and a feedback signal to regulate the power supply output; providing feedback control for the power supply based on the feedback signal carried by the electrical terminal; detecting an under-voltage condition based on the input signal; and disabling the power supply when the under-voltage condition is detected.
In another aspect, a method for handling an under-voltage condition at an input voltage of power supply circuit includes detecting an input under-voltage condition during the disabling of the power supply and during power-up; and alternatingly disabling and enabling the power supply when the input under-voltage condition is present.
Advantages of the invention include one or more of the following. The power supply output behaves in a predictable manner when power is turned on and off or during input power interruptions. The invention prevents glitches at the output when power is turned on and off. The invention requires only one resistor external to the regulator to sense input voltage. The number of external components is reduced. Only one input is required to supply feedback information and under-voltage information to the regulator. Thus the number of electrical terminals required for the regulator is reduced. The reduction in electrical terminals in turn reduces circuit area in the regulator dedicated to protect the regulator against latch-up and electrostatic discharge (ESD) conditions. Further, a small package with a low pin count may be used. Such a small package reduces printed circuit board (PCB) wiring complexities and PCB area. The reduction in terminal count also allows one or more terminals to be used as an extra thermal conduction path between the regulator to a heat sink on a PCB for rapid heat dissipation.